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Publications of Fakhreddine Ghaffari

Book chapters
[1] F. Ghaffari, O. Romain and B. Granado. (2019) "Mitigation Transient Faults by Backward Error Recovery in SRAM-FPGA”, in: Velazco R., McMorrow D., Estela J. (Eds.) Radiation Effects on Integrated Circuits and Systems for Space Applications. Springer International Publishing. 20 pages. Book ISBN 978-3-030-04659-0. DOI 10.1007/978-3-030-04660-6.

Journal papers
[18] Emmanuel Boutillon, Chris Winstead, Fakhreddine Ghaffari, “The Syndrome Bit Flipping Algorithm for LDPC Codes”, in IEEE Communications Letters 2023, [ download ]
[17] Arnau Dillen, Fakhreddine Ghaffari, Olivier Romain, Bram Vanderborght, Uros Marusic, Sidney Grosprêtre, Ann Nowe, Romain Meeusen, Kevin De Pauw, “Optimal Sensor Set for Decoding Motor Imagery from EEG”, in Applied Sciences 2023, Section: Applied Biosciences and Bioengineering., [ download ]
[16] Dillen A, Lathouwers E, Miladinovi ́c A, Marusic U, Ghaffari F, Romain O, Meeusen R and De Pauw K (2022) “A data-driven machine learning approach for brain-computer interfaces targeting lower limb neuroprosthetics”. Frontiers in Human Neuroscience. 16:949224. doi: 10.3389/fnhum.2022.949224, [ download ]
[15] Sébastien Thomet, Fakhreddine Ghaffari, Serge De Paoli, Jean-Marc Daveau, Fady Abouzeid, Olivier Romain, “Observation framework of errors in microprocessors with machine learning location inference of radiation-induced faults”, Microelectronics Reliability Journal, Volume 137, 2022, ISSN 0026-2714, [ download ]
[14] Dillen, Arnau and Steckelmacher, Denis and Efthymiadis, Kyriakos and Langlois, Kevin and De Beir, Albert and Marušič, Uroš and Vanderborght, Bram and Nowé, Ann and Meeusen, Romain and Ghaffari, Fakhreddine and Romain, Olivier and De Pauw, Kevin, “Deep learning for biosignal control: insights from basic to real-time methods with recommendations”, Journal of Neural Engineering, 2022, http://iopscience.iop.org/article/10.1088/1741-2552/ac4f9a, [ download ]
[13] Hangxuan Cui, Fakhreddine Ghaffari, Khoa Le, David Declercq, Jun Lin and Zhongfeng Wang, “Design of High-Performance and Area-Efficient Decoder for 5G LDPC Codes”, in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. PP, no. 99, pp. 2021 [ download ]
[12] K. Le, F. Ghaffari, L. Kessal, D. Declercq, E. Boutillon, C. Winstead and B. Vasic, “A Probabilistic Parallel Bit Flipping Decoder for Low-Density Parity-Check Codes”, in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. PP, no. 99, pp. 2018 [ download ]
[11] K. Belwafi, O.Romain, S. Gannouni, F. Ghaffari, Ridha Djemal, Bouraoui Ouni, “An embedded implementation based on adaptive filter bank for brain-computer interface systems”, in Journal of Neuroscience Methods, https://doi.org/10.1016/j.jneumeth.2018.04.013 ,May 2018 [ download ]
[10] B. Unal, A. Akoglu, F. Ghaffari and B. Vasic, “Hardware Implementation and Performance Analysis of Resource Efficient Probabilistic Hard Decision LDPC Decoders”, in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. PP, no. 99, pp. 2018, [ download ]
[9] K. Le, D. Declercq, F. Ghaffari, L. Kessal, O. Boncalo and V. Savin, "Variable-Node-Shift Based Architecture for Probabilistic Gradient Descent Bit Flipping on QC-LDPC Codes," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 65, no. 7, pp. 2183-2195, July 2018. doi: 10.1109/TCSI.2017.2777802, [ download ]
[8] T. T. Nguyen-Ly, V. Savin, K. Le, D. Declercq, F. Ghaffari and O. Boncalo, "Analysis and Design of Cost-Effective, High-Throughput LDPC Decoders," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 3, pp. 508-521, March 2018. doi: 10.1109/TVLSI.2017.2776561 [ download ]
[7] D. Declercq, V. Savin, O. Boncalo and F. Ghaffari, “An Imprecise Stopping Criterion based on in-Between Layers Partial Syndromes”, in IEEE Communications Letters, 2018, vol. 22, no. 1, pp. 13-16, Jan. 2018. doi: 10.1109/LCOMM.2017.2718523, [ download ]
[6] K. Le, F. Ghaffari, D. Declercq and B. Vasić, "Efficient Hardware Implementation of Probabilistic Gradient Descent Bit-Flipping," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 64, no. 4, pp. 906-917, April 2017. doi: 10.1109/TCSI.2016.2633581, [ download ]
[5] Kais Belwafi, Fakhreddine Ghaffari, Ridha Djemal and Olivier Romain “A Hardware/Software Prototype of EEG-based BCI System for Home Device Control”, Journal of Signal Processing Systems, pp. 1-17, doi. 10.1007/s11265-016-1192-8 May 2016, [ download ]
[4] Boncalo, O.; Amaricai, A.; Savin, V.; Declercq, D.; Ghaffari, F., "Check node unit for LDPC decoders based on one-hot data representation of messages", Electronics Letters, 2015, 51, (12), p. 907-908, 6 11 2015 ,DOI: 10.1049/el.2015.0108 IET Digital Library, [ download ]
[3] Ismail Ktata, Fakhreddine Ghaffari, Bertrand Granado, and Mohamed Abid, "Dynamic Application Model for Scheduling with Uncertainty on Reconfigurable Architectures", in International Journal of Reconfigurable Computing, vol. 2011, Article ID 156946, 15 pages, 2011. doi:10.1155/2011/156946 [ download ]
[2] Fakhreddine Ghaffari, Benoît Miramond, François Verdier, "Run-time HW/SW scheduling of data flow applications on reconfigurable architectures", in EURASIP Journal of Embedded Systems. 2009, 14 pages. doi: 10.1155/2009/976296. [ download ]
[1] Fakhreddine Ghaffari, Michel Auguin, Mohamed Abid, Maher Ben Jemaa, "Dynamic and On-line Design Space Exploration for Reconfigurable Architectures", in HiPEAC Transactions on High-Performance Embedded Architecture and Compilers. Volume 4050/2007, ISBN 978-3-540-71527-6, pages 179-193, Springer. [ download ]

International Conferences
[51] Dillen, A., Ghaffari, F., Romain, O., Vanderborght, B., Meeusen, R., Roelands, B., De Pauw, K. "Optimal sensor set for decoding motor imagery from EEG". In 11th International IEEE EMBS Conference on Neural Engineering NER 2023 [ download ]
[50] F. Ghaffari and K. Le, "An Enhanced Check-Node Architecture for 5G New Radio LDPC Decoders," in 2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2021), Dubai, United Arab Emirates, 2021, pp. 1-6, doi: 10.1109/ICECS53924.2021.9665587 [ download ]
[49] S. Thomet et al., "FIRECAP: Fail-Reason Capturing hardware module for a RISC-V based System on a Chip," in 2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2021, pp. 1-6, doi: 10.1109/DFT52944.2021.9568317
[48] Franklin Cochachin, Laura Luzzi and Fakhreddine Ghaffari, "Reduced Complexity of a Successive Cancellation Based Decoder for NB-Polar Codes", 2021 11th International Symposium on Topics in Coding (ISTC), Aug 2021, Montreal, Canada. pp.211-215, 10.1109/ISTC49272.2021.9594140 [ download ]
[47] Sébastien Thomet, Serge De-Paoli, Fakhreddine Ghaffari, Jean-Marc Daveau, Valérie Bertin, Fady Abouzeid, Olivier Romain, Philippe Roche, “Fail-Reason Capturing hardware module for a RISC-V based System-on-a-Chip”, 2021 21th European Conference on Radiation and Its Effects on Components and Systems (RADECS 2021).
[46] Nguyen Duc Phuc, Khoa Le Trung, Fakhreddine Ghaffari and David Declercq,"Reliability Enhancement for Multi-level Cell NAND Flash Memory Using Error Asymmetry", in 2019 25th Asia-Pacific Conference on Communications (APCC'19), Ho Chi Minh City, Vietnam, November 2019.
[45] Hangxuan Cui, Khoa Le Trung, Fakhreddine Ghaffari, David Declercq, Jun Lin and Zhongfeng Wang, “An Enhanced Offset Min-Sum decoder for 5G LDPC Codes” in 2019 25th Asia-Pacific Conference on Communications (APCC'19)Ho Chi Minh City, Vietnam, November 2019.
[44] S. Thomet, S. De-Paoli, F. Ghaffari, F. Abouzeid, O. Romain, P. Roche, "CLASS: on-Chip Lightweight Accurate SEU/SET event claSSifier", In 2019 19th European Conference on Radiation and Its Effects on Components and Systems (RADECS), Montpellier, France, 2019
[43] D. Nguyen, K. Le, F. Ghaffari and D. Declercq, "Performance Enhancement of Polar Codes in Multi-level Cell NAND Flash Memories using Systematic Encoding," 2019 19th International Symposium on Communications and Information Technologies (ISCIT), Ho Chi Minh City, Vietnam, 2019, pp. 621-626. doi: 10.1109/ISCIT.2019.8905168
[42] H. Cui, K. Le, F. Ghaffari, D. Declercq, J. Lin and Z. Wang, "A Decomposition Mapping based Quantized Belief Propagation Decoding for 5G LDPC Codes," 2019 19th International Symposium on Communications and Information Technologies (ISCIT), Ho Chi Minh City, Vietnam, 2019, pp. 616-620. doi: 10.1109/ISCIT.2019.8905133
[41] K. Le Trung, F. Ghaffari and D. Declercq, "An Adaptation of Min-Sum Decoder for 5G Low-Density Parity-Check Codes," 2019 IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, 2019, pp. 1-5. doi: 10.1109/ISCAS.2019.8702344
[40] F. Ghaffari, K. Le and D. Declercq, "The Probabilistic Finite Alphabet Iterative Decoder for Low-Density Parity-Check Codes," 2019 17th IEEE International New Circuits and Systems Conference (NEWCAS), Munich, Germany, 2019, pp. 1-4. doi: 10.1109/NEWCAS44328.2019.8961256
[39] C. Winstead, E. Boutillon, T. Tithi and F. Ghaffari, “Recent Advances on Stochastic and Noise Enhanced Methods in Error Correction Decoders” 2018 10th International Symposium on Turbo Codes and Iterative Information Processing (ISTC 2018), Hong Kong, 3-7 December 2018
[38] Fakhreddine Ghaffari and Bane Vasic, “Probabilistic Gradient Descent Bit-Flipping Decoders for Flash Memory Channels”, in Circuits and Systems (ISCAS 2018), IEEE International Symposium on, Italy, 27-30 May 2018. [ download ]
[37] Khoa Le, Fakhreddine Ghaffari, and David Declercq, “On the use of Probabilistic Parallel Bit-Flipping decoder for the storage systems”, to appear in 2018 IEEE 61th International Midwest Symposium on Circuits and Systems (MWSCAS), Windsor, ON, Canada August 5th-8th, 2018
[36] Khoa Le, Fakhreddine Ghaffari, Lounis Kessal, David Declercq, Valentin Savin and Oana Boncalo “Lightweight Hardware Architecture for Probabilistic Gradient Descent Bit Flipping on QC-LDPC Codes”, in Circuits and Systems (ISCAS 2018), IEEE International Symposium on, Italy, 27-30 May 2018 [ download ]
[35] Khoa Le and Fakhreddine Ghaffari, “On the Use of Hard-Decision LDPC Decoders on MLC NAND Flash Memory”, in IEEE Int. Conference on Systems, Signals & Devices SSD'18, Hammamet, Tunisia, March 19-22 2018. [ download ]
[34] Fakhreddine Ghaffari, Burak Unal, Ali Akoglu, Khoa Le, David Declercq and Bane Vasic, “Efficient FPGA Implementation of Probabilistic Gallager B LDPC Decoder”, in 2017 IEEE International Conference on Electronics, Circuits and Systems (ICECS), Batumi, Georgia, 2017 [ download ]
[33] Khoa Le, Fakhreddine Ghaffari, David Declercq, Bane Vasic and Chris Winstead “A Novel High-Throughput, Low-Complexity Bit-Flipping Decoder for LDPC Codes” in International Conference on Advanced Technologies for Communications, (ATC 2017), October 18- 20, Quynhon, Vietnam, pp. 126-131. doi: 10.1109/ATC.2017.8167601 [ download ]
[32] Marc Alexandre Kacou, Fakhreddine Ghaffari, Olivier Romain, Bruno Condamin, “Error Rate Estimation of a Design Implemented in an FPGA based on the Operating Conditions” EWDTS 2017 – 15th IEEE EAST-WEST DESIGN & TEST SYMPOSIUM (EWDTS-2017) Novi Sad, Serbia, pp. 1-7 ,Sept 29 - Oct 2, 2017. doi: 10.1109/EWDTS.2017.8110059 [ download ]
[31] Marc Alexandre Kacou, Fakhreddine Ghaffari, Olivier Romain, Bruno Condamin, “FPGA Static Timing Analysis Enhancement based on Real Operating Conditions” IECON 2017 – 43th Annual Conference of the IEEE Industrial Electronics Society, Beijing, 2017, pp.3556-3561. doi: 10.1109/IECON.2017.8216602 [ download ]
[30] Fakhreddine Ghaffari, Ali Akoglu, Bane Vasic and David Declercq, “Multi-mode Low-latency Software-defined Error Correction for Data Centers”, invited paper, 2017 26th International Conference on Computer Communication and Networks (ICCCN), Vancouver, Canada, August 2017. pp. 1-8. doi: 10.1109/ICCCN.2017.8038467 [ download ]
[29] Khoa Le, Fakhreddine Ghaffari, David Declercq, Bane Vasic, “Hardware Optimization of the Perturbation for Probabilistic Gradient Descent Bit Flipping Decoders” in Circuits and Systems (ISCAS 2017), IEEE International Symposium on, Best Student Papers (Honorable Mention), 28-31 May 2017, Baltimore, MD, 2017, pp.1-4. doi: 10.1109/ISCAS.2017.8050695 [ download ]
[28] Y. Baga, F. Ghaffari, D. Declercq, E. Zante, and M. Nahmiyace, "Reduction of Frames Storage Size in AFDX Reception End-System using Lossless Compression Algorithm," 2017 IEEE/AIAA 35th Digital Avionics Systems Conference (DASC), 17-21 September 2017, St Petersburg, FL, USA. pp. 1-8. doi: 10.1109/DASC.2017.8102086 (BEST PAPER AWARD FINALIST) [ download ]
[27] Yohan Baga, Morgane Richaud, Fakhreddine Ghaffari, David Declercq, Etienne Zante and Michael Nahmiyace, “Probabilistic Model of AFDX Frames Reception for End System Backlog Assessment”, 12th IEEE International Symposium on Industrial Embedded Systems, (SIES 2017), pp. 1-6, 14-16 June 2017, Toulouse, France, doi: 10.1109/SIES.2017.7993400 [ download ]
[26] Burak Unal, Fakhreddine Ghaffari, Ali Akoglu, David Declercq and Bane Vasic “Analysis and Implementation of Resource Efficient Probabilistic Gallager B LDPC Decoder”, in New Circuits and Systems Conference (NEWCAS), 2017 IEEE 15th International, 25-28 June 2017, Strasbourg, France. pp. 333-336, (BEST PAPER AWARD FINALIST), doi: 10.1109/NEWCAS.2017.8010173 [ download ]
[25] Truong Nguyen-Ly, Khoa Le, Valentin Savin, David Declercq, Fakhreddine Ghaffari, Oana Boncalo, "Non-Surjective Finite Alphabet Iterative Decoders", 2016 IEEE International Conference on Communications (ICC), Kuala Lumpur, 2016, pp. 1-6. doi: 10.1109/ICC.2016.7511111 [ download ]
[24] Y. Baga, F. Ghaffari, E. Zante, M. Nahmiyace and D. Declercq, "Worst frame backlog estimation in an avionics full-duplex switched ethernet end-system," 2016 IEEE/AIAA 35th Digital Avionics Systems Conference (DASC), Sacramento, CA, 2016, pp. 1-10. doi: 10.1109/DASC.2016.7777990 [ download ]
[23] D. Declercq, C. Winstead, B. Vasic, F. Ghaffari, P. Ivanis and E. Boutillon, "Noise-aided gradient descent bit-flipping decoders approaching maximum likelihood decoding," 2016 9th International Symposium on Turbo Codes and Iterative Information Processing (ISTC), Brest, 2016, pp. 300-304. doi: 10.1109/ISTC.2016.7593125 [ download ]
[22] M. A. Kacou, F. Ghaffari, O. Romain and B. Condamin, "Influence of high-power electric motor on an FPGA used in the drive system of electric car," IECON 2016 - 42nd Annual Conference of the IEEE Industrial Electronics Society, Florence, 2016, pp. 4796-4801. doi: 10.1109/IECON.2016.7794075 [ download ]
[21] Kais belwafi, Ridha Djemal, Fakhreddine Ghaffari, Olivier Romain, Bouraoui Ouni, Sofien Gannouni, "Online adaptive filters to classify left and right hand motor imagery", BIOSIGNALS 2016, DOI: https://doi.org/10.5220/0005846503350339 [ download ]
[20] Khoa Le, David Declercq, Fakhreddine Ghaffari, Christian Spagnol,Emmanuel Popovici, Predrag Ivanis, Bane Vasic, "Efficient Realization of Probabilistic Gradient Descent Bit Flipping Decoders", Circuits and Systems (ISCAS), IEEE International Symposium on , Lisbon, 2015, pp. 1494-1497, 24-27 May 2015. doi: 10.1109/ISCAS.2015.7168928 [ download ]
[19] A.Hera, O. Boncalo, C.-E. Gavriliu, A. Amaricai, V. Savin, D. Declercq, F. Ghaffari. : "Analysis and Implementation of on the Fly Stopping Criteria for Layered QC LDPC Decoders", Mixed Design of Integrated Circuits & Systems (MIXDES), 2015 Proceedings of the 22nd International Conference, 25-27 June 2015. Torun, 2015, pp. 287-291. doi: 10.1109/MIXDES.2015.7208528 [ download ]
[18] Truong Nguyen-Ly, Khoa Le, Fakhreddine Ghaffari, Alexandru Amaricai, Oana Boncalo, Valentin Savin and David Declercq, "FPGA Design of High Throughput LDPC Decoder based on Imprecise Offset Min-Sum Decoding", New Circuits and Systems Conference (NEWCAS), 2015 IEEE 13th International , Grenoble, 2015, pp. 1-4. 07-10 June 2015, doi: 10.1109/NEWCAS.2015.7182119. [ download ]
[17] Kais Belwafi, Ridha Djemal, Fakhreddine Ghaffari, Olivier Romain, "An Adaptive EEG filtering approach to maximize the classification accuracy in motor imagery", in proc of 2014 IEEE Symposium Series on Computational Intelligence SSCI’2014 December 9-12, 2014 Orlando, Florida, U.S.A. pp. 121-126, doi: 10.1109/CCMB.2014.7020704 [ download ]
[16] Fouad Sahraoui, Fakhreddine Ghaffari, Amine Benkhelifa, Bertrand Granado, "Context Aware Placement Algorithm for SRAM-based FPGA to minimize Checkpoint/Recovery overhead", in proc of 2014 International Conference on ReConFiggurable Computing and FPGA, ReConFig 2014, December 8-10, 2014 Cancun, Mexico. pp. 1-6. doi: 10.1109/ReConFig.2014.7032506 [ download ]
[15] F. Ghaffari, F. Sahraoui, M. E. A. Benkhelifa, B. Granado, M. A. Kacou and O. Romain, "Fast SRAM-FPGA Fault Injection Platform based On Dynamic Partial Reconfiguration", 26th IEEE International Conference on Microelectronics (ICM), December 2014. Doha, 2014, pp. 144-147. doi: 10.1109/ICM.2014.7071827 [ download ]
[14] Kais, B., Ghaffari, F., Romain, O., and Djemal, R., "An embedded implementation of home devices control system based on brain computer interface", 26th IEEE International Conference on Microelectronics (ICM), December 2014. Doha, 2014, pp. 140-143. doi: 10.1109/ICM.2014.7071826 [ download ]
[13] F. Sahraoui, F. Ghaffari, M. El Amine Benkhelifa, and B. Granado. "Reliability Assessment of Backward Error Recovery for SRAM-based FPGAs". In Design and Test Symposium (IDT), December 2014 9th International Conference. Algiers, 2014, pp. 248-252. doi: 10.1109/IDT.2014.7038622 [ download ]
[12] Ahmed S. Zahid, Bai Y., Dhif I., Lambert L., Mehdbhi I., Garda P., Granado B., Hachicha K., Pinna A., Ghaffari F. et al, "SmartEEG: a multimodal tool for EEG signals" in Proceedings of IEEE FTFC Conference - Faible Tension Faible Consommation, Monaco : Monaco (2014) - http://hal.archives-ouvertes.fr/hal-01017444. pp. 1-4, doi: 10.1109/FTFC.2014.6828622 [ download ]
[11] F. Sahraoui, F. Ghaffari, M. El Amine Benkhelifa, and B. Granado. "An efficient ber-based reliability method for sram-based fpga". In Design and Test Symposium (IDT), 2013 8th International Conference, pages 1–6. Marrakesh, 2013, pp. 1-6. doi: 10.1109/IDT.2013.6727129 [ download ]
[10] Ismail Ktata, Fakhreddine Ghaffari, Bertrand Granado and Mohamed Abid, ENIS National School of Engineers of Sfax, Tunisia: Novel Approach for Modeling Very Dynamic and Flexible Real Time Applications International Conference on Reconfigurable Communication-centric Systems on Chip, ReCoSoC 2010, Karlsruh, Germany [ download ]
[9] Ismail Ktata, Fakhreddine Ghaffari, Bertrand Granado, Mohamed Abid,"Prediction Performance Method for Dynamic Task Scheduling, case study: the OLLAF Architecture" 5th International Design & Test Workshop IDT'2010, Abou Dhabi , Emirates.pp.97-102. doi: 10.1109/IDT.2010.5724416 [ download ]
[8] Fakhreddine GHAFFARI, Benoit MIRAMOND and François VERDIER, "Dynamic adaptation of Hardware-Software scheduling for Reconfigurable System-on-Chip" 19th IEEE/IFIP International Symposium on Rapid System Prototyping (RSP 2008) Monterey California, USA, June 02-05, 2008. pp. 112-118, doi: 10.1109/RSP.2008.28 [ download ][ slides ]
[7] GHAFFARI Fakhreddine , AUGUIN Michel, "An efficient on-line Approach for On-Chip HW/SW Partitionner and Scheduler", 19th International Conference on Architecture of Computing Systems ARCS Workshop: Dynamically Reconfigurable Systems DRS2006, pp 215-223 Frankfurt, Germany, Mars 12th - 17, 2006 [ download ][ slides ]
[6] GHAFFARI Fakhreddine , AUGUIN Michel, ABID MOHAMED, BEN JEMAA Maher, "An adaptive on-line HW/SW Partitioning for soft real time reconfigurable Systems", 8th EUROMICRO Conference on Digital System Design (DSD), pp. 379-382 Porto, Portugal, August 30th - September 3rd, 2005, doi: 10.1109/DSD.2005.12 [ download ]
[5] Fakhfakh-Ghribi, F. Ghaffari, M. Ben Jemaa and M. Abid, "Execution Time Assessment of an Application on a Heterogeneous Architecture. Case of Study: Motion Detection" Third IEEE International Conference on Systems, Signals & Devices SSD'05, pp 246-251 Sousse, Tunisia 21 – 24 March 2005.
[4] F. Ghaffari, M. Benjemaa, M. Abid, M. Auguin, "On line HW/SW Partitioning and scheduling for data dependent execution time applications", 30th EUROMICRO Conference/Proceedings of the Work In Progress Session ISBN 3-902457-05-8, pp 43-44. Rennes – France, 1- 3 September 2004. [ download ]
[3] F.GHAFFARI, M.ABID, M.BENJEMAA, M.AUGUIN. "Algorithme de prédictions statistiques du temps d’exécution basée sur la méthode de KPPV", 1er Congrès International IEEE Signaux, Circuits et Systèmes SCS'2004, pp. 265-271 Monastir, Tunisie 18-21 Mars 2004. [ download ] [ slides ]
[2] F.GHAFFARI, M.BENJEMAA, M.AUGUIN. "Algorithms for the Partitioning of Applications containing variable duration tasks on reconfigurable architectures". ACS/IEEE Int. Conference. on Computer Systems and Applications AICCSA 2003, pp13-18 Tunis, TUNISIA 14 – 18 July 2003, doi: 10.1109/AICCSA.2003.1227450 [ download ] [ slides ]
[1] F.GHAFFARI, M.BENJEMAA and M.AUGUIN "HW/SW Partitioning of Embedded Applications with Variable execution time on a Reconfigurable Architecture", in IEEE Int. Conference on Systems, Signals & Devices SSD'03, pp 151-157 Sousse, TUNISIA 26 – 28 March 2003. [ download ] [ slides ]

National publications
[9] Fouad Sahraoui, Fakhreddine Ghaffari, Mohamed El Amine BENKHELIFA, Bertrand Granado, "Backward Error Recovery for SRAM-Based FPGAs", In 7ème Colloque National du GDR SoC-SiP du 10 au 12 Juin 2013 Lyon.
[8] Fouad Sahraoui, Fakhreddine Ghaffari, Mohamed El Amine BENKHELIFA, Bertrand Granado, "Enhanced Error-Correcting Code with Checkpoint/ Recoveryon FPGAs", In 6ème Colloque National du GDR SoC-SiP du 13 au 15 Juin 2012 Paris.
[7] Laurent Rodriguez, Benoit Miramond, Fakhreddine Ghaffari, Bertrand Granado, "Self-organization in embodied reconfigurable architectures", In 6ème Colloque National du GDR SoC-SiP du 13 au 15 Juin 2012 Paris.
[6] Fakhreddine Ghaffari, "Partitionnement en ligne d'applications flots de données pour des architectures temps réel auto-adaptatives", PhD dissersation (in french), 2006. [ download ]
[5] Fakhreddine Ghaffari, "Etude du partitionnement logiciel/matériel d’applications à distribution variable de charge de calcul", DEA dissersation (in french), 2002. [ download ]
[4] Fakhreddine Ghaffari, Michel Auguin, Maher Ben jemaa, Mohamed Abid, "Approche de partitionnement en ligne d'applications à temps d’exécution variable", in Renpar’15 /ASF/SYMPAAA. pp. 365-371, La colle sur loup, France 14 – 17 Octobre 2003. [ download ]
[3] Fakhreddine Ghaffari, Michel Auguin, Maher Ben jemaa, "Portage d'un noyau multitâche temps réel sur un processeur embarqué", in Troisième Journées Scientifiques des jeunes chercheurs en Génie Electrique et Informatique GEI 2003, Mahdia, Tunisie 18 – 20 Mars 2003. [ download ]
[2] Fakhreddine Ghaffari, Michel Auguin, Maher Ben jemaa, "Partitionnement d’applications à temps d'exécution variable sur architectures reconfigurables", Journées Francophones sur l'Adéquation Algorithme Architecture, JFAAA'2002, pp 41-44 Monastir, Tunisie 16 – 18 Décembre 2002. [ download ]
[1] Fakhreddine Ghaffari, Michel Auguin, Maher Ben jemaa, "Etude du partitionnement logiciel/matériel d’applications à distribution variable de charge de calcul", Renpar’14 /ASF/SYMPA pp. 334-338 Hammamet, TUNISIE 10 – 13 avril 2002. [ download ]




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