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Lounis Kessal,
ETIS, UMR 8051,
6, avenue du Ponceau,
F-95000, Cergy-Pontoise,
France
Tel: (+33) 1 30 73 62 99
Fax: (+33) 1 30 73 66 27

lounis.kessal@ensea.fr

My research interest is in algorithms of real-time image processing implementation : ASIC and reconfigurable computing architecture.
- Dynamic and partial reconfiguration of FPGA.
- Reconfigurable System On Chip (RSoC).
- Error correcting code algorithms and their hardware implementations (ASIC, FPGA).