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Miramond Benoît's HomePage

Miramond,
ETIS, UMR 8051,
6, avenue du Ponceau,
F-95000, Cergy-Pontoise,
France
Tel: (+33) 1 30 73 66 10
Fax: (+33) 1 30 73 66 27

miramond@ensea.fr



Embodied Computing
The advent of massively parallel many-core architectures on a chip can be considered as a good opportunity to rethink the classical computation model used for several decays and that now shows some limitations to follow both the potential and the usage of new technologies. In this paper, the way explored to study new solutions is directly inspired from biology, and more precisely from neurosciences. This way could lead, for example, to best practices for dynamically partitioning application tasks onto a set of processing cores. We propose in this approach a bio-inspired hardware substrate that brings a plasticity property into many-core architectures. We are developping a hardware controller in which a grid of processing elements will support a set of neuro-cognitive processes in order to drive a robot in different multimodal tasks. We propose an original distributed and hardware artificial neural network as support for this plasticity. It is inspired by Neural Fields equations that have shown self-organizing behaviors and can be suitable for this purpose. It can be used to take allocation decisions locally, taking into account the state of the whole system through the emergent behavior of the network. We are proposing an original neural model and its implementation onto FPGA in the context of artificial vision.

Real-time vision
This work proposes a smart camera composed of a full-hardware vision architecture coupled with an embedded camera sensor. The hardware architecture corresponds to low-level visual perception processes. The architecture is deployed onto reconfigurable circuits. In a robotic context, the integration of such a system onto mobile robots enables not only to accelerate the visual processing till real-time behavior but also to compress the data-flow at the output of the camera. The results obtained during indoor robotic missions show an important reduction factor of data communication.

Reconfigurable computing
We are working on the design of smart micro-electronic architectures. These architectures are deployed onto reconfigurable devices (FPGA) in several domains of embedded and real-time systems (image processing, bio-medical devices, telecommunication, automotive, aeronautic, robotics ...). We are interested in embedding new mecanisms for non-conventional computing systems, both efficient and adaptive :

Related financed research projects

Previous financed research projects

Others subjects of interest :