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J. Lorandel, M. A. Khelif, and O. Romain, “A Low-cost Hardware Attack Detection Solution for IoT Devices”, in The 31st IEEE International Symposium on Industrial Electronics (ISIE), 1-3 June 2022.
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M. A. Khelif, J. Lorandel and O. Romain, “Non-invasive I2C Hardware Trojan Attack Vector”, in 34th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS'21), 6-8 oct. 2021.
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J. Lorandel, H. Lahdhiri, E. Bourdel, S. Monteleone and M. Palesi “Efficient Compression Technique for NoC-based Deep Neural Networks Accelerators”, in Euromicro Conference on Digital System Design (DSD’2020), 26-28 Aug. 2020.
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H. Lahdhiri, M. Palesi, S. Monteleone, D. Patti, G. Ascia, J. Lorandel, E. Bourdel, and V. Catania “DNNZip: Selective Layers Compression Technique in Deep Neural Network Accelerators”, in Euromicro Conference on Digital System Design (DSD’2020), AMDL Special Session, 26-28 Aug. 2020. [ download ]
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H. Lahdhiri, J. Lorandel, E. Bourdel, “Threshold-based routing algorithm for RF-NoC OFDMA architecture”, in 14th 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2019), 1-3 July 2019.
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M. A. Khelif, J. Lorandel, O. Romain, “Toward a Hardware Man-in-the-Middle Attack on PCIe bus for Smart Data Replay” in 2019 EUROMICRO Digital System Design Conference, 2019.
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M. A. Khelif, J. Lorandel, O. Romain, “A Versatile Emulator of MitM for the identification of vulnerabilities of IoT devices, a case of study: smartphones”, in the 3rd International Conference on Future Networks & Distributed Systems (ICFNDS), 1-2 July 2019, University of Paris Sud, France.
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Julien LeKernec, Francesco Fioranelli, Shufan Yang, Jordane Lorandel and Olivier Romain,
Radar for assisted living in the context of Internet of Things for Health and beyond,
in 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2018) Verona, Italy, 8-10 Oct. 2018.
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Y. Nasser, J.C. Prévotet, J. Lorandel, and M. Hélard,
Dynamic Power Estimation Based on Switching Activity Propagation,
in FPL 2017 Phd Forum, Ghent, Belgium, Sept. 2017.
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Y. Nasser, J.C. Prévotet, M. Hélard, J. Lorandel,
Power Estimation on FPGAs Based on Signal Information Propagation Through Digital Operators,
in IEEE International Conference on Sensor Smart and Emerging Technologies, Lebanon, Sept. 2017.
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J. Lorandel, J.C. Prévotet and M. Hélard,
Efficient Modelling of FPGA-based IP blocks using Neural Networks,
in International Symposium on Wireless Communication Systems (ISWCS'16),
Poznan, Poland, 2016.
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M. A. Rihani, F. Nouvel, J.C. Prévotet, M. Mroue, Y. Mohanna and J. Lorandel,
Dynamic and Partial Reconfiguration Power Consumption Runtime Measurements Analysis for ZYNQ SoC Devices,
in International Symposium on Wireless Communication Systems (ISWCS'16),
Poznan, Poland, 2016.
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J. Lorandel, J.C. Prévotet and M. Hélard,
Fast Power and Energy Efficiency Analysis of FPGA-based Wireless Base-band Processing,
in International Workshop on High Performance Energy Efficient Embedded Systems (HIP3ES'16),
Pragua, Czech Republic, 2016.
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J. Lorandel, J.C. Prévotet and M. Hélard,
Dynamic Power Evaluation of LTE Wireless Baseband Processing on FPGA,
The 2015 Conference on Design and Architectures for Signal and Image Processing, Sep 2015,
Krakow, Poland.
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J. Lorandel, J.C. Prévotet and M. Hélard,
Dynamic Power Estimation of FPGA-based Wireless Communication Systems,
The International Conference on WIreless Technologies, embedded and intelligent Systems WITS-2015,
April 2015, Fes, Marocco.
Publication in Revue Méditerranéenne des Télécommunications |